Project goal: Create a new Jenkins plugin for one of widely used EDA tools
Skills to study/improve: Java, EDA Tools
The idea is to create a Jenkins plugin for one of widely used EDA tools. Both ASIC or FPGA design flow are acceptable, the tool should be proposed by the potential student. Open-source EDA tools would be preferable (e.g. Yosys, FuseSoC, ArachnePnR, icetools), but we also consider conditionally-free tools (like FPGA design EDAs).
Examples of tool integration:
Tool launch and publishing steps for Free-style and/or Pipeline jobs
Integration with Warnings Plugin for report parsing.
Reporting of FPGA resource utilization (per build + trends)
Timing report trend publishing
Integrating UVM reports into Jenkins build and project pages
More details are available in the draft project idea.